上海-浦东新区 | 无工作经验 | 本科 | 招若干人 | 02-15发布
Job Description:
Become a member of a world class analog design team in providing high performance analog and mixed mode circuits for leading data communications and networking products. Designers have opportunities to design regulators, high performance analog-to-digital converters (ADC), digital-to-analog converters (DAC), filter, adaptive equalizers, clock and data recovery (CDR) circuits, and phase-locked loop (PLL) or other timing circuits. Team members participate in circuit architecture, circuit implementation, design review, layout, and silicon validation.
Qualification;
– MS/PHD in EE.
– Deep understanding on device physics.
– Design experience in basic analog circuits, such as Op-Amp, comparator, bandgap, regulator, etc.
– Design experience in areas below is a plus, such as analog-to-digital converters (ADC), digital-to-analog converters (DAC), PGA/VGA, filter, adaptive equalizers, clock and data recovery (CDR) circuits, and phase-locked loop (PLL).
– Knowledge in signal processing and communication theories is a plus.
– Familiar with EDA design tools such as Hspice, Virtuoso, etc.
– Good team player and communication skills.
– Good English skill.
上班地址:张江高科技园区科苑路399号
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